MOD-12 Counter

Block diagram for MOD-12 Counter:

Verilog Code for Modulus counter: (MOD-12 counter)

module mod12_counter(

             input clock,

    input reset,

    output reg [3:0] q );

always@(posedge clock)

begin

if(reset)

q <=4'b0000;

else if(q<=4'b1010)

q <= q+1'b1;

else

q <= 4'b0000;

end

endmodule